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power management 1 SC621A led light management unit charge pump, 4 leds, 400ma flash led, dual ldos, and i 2 c interface ? 2007 semtech corporation features input supply voltage range 3.0v to 5.5v charge pump modes 1x, 1.5x and 2x four programmable current sinks with 32 steps from 0.5ma to 25ma flash led 400ma max in fl ash mode, 250ma max continuous for spotlight two user-confi gurable 100ma low-noise ldo regulators charge pump frequency 250khz i 2 c compatible interface up to 400khz backlight current accuracy 1.5% typical backlight current matching 0.5% typical programmable fade-in/fade-out for main backlight external fl ash control pin to sync with camera optional 1s fl ash time out automatic sleep mode (leds off ) i q = 100a low shutdown current 0.1a (typical) ultra-thin package 3mm x 3mm x 0.6mm fully weee and rohs compliant applications cellular phone backlighting and fl ash pda backlighting and fl ash camera i/o and core power ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? description the SC621A is a high effi ciency charge pump led driver using semtechs proprietary mahxlife tm technology. performance is optimized for use in single-cell li-ion battery applications. the charge pump provides backlight current in conjunction with four matched current sinks. it also can supply continuous or bursted current to a fl ash led using the dedicated fl ash driver current sink. the load and supply conditions determine whether the charge pump operates in 1x, 1.5x, or 2x mode. an optional fading feature that gradually adjusts the backlight current is provided to simplify control software. a fl ash-timeout feature disables the fl ash if active for longer than 1 second. the SC621A also provides two low-dropout, low-noise linear regulators for powering a camera module or other peripheral circuits. the SC621A uses an i 2 c compatible serial interface. the interface controls all functions of the device, including backlight and fl ash currents as well as two ldo voltage outputs. the fl ash/spotlight output is triggered via either the i 2 c interface or a dedicated pin. in sleep mode, the device reduces quiescent current to 100 a while continuing to monitor the serial interface. the two ldos can be enabled when the device is in sleep mode. total current reduces to 0.1 a in shutdown. SC621A vin sda flen byp agnd pgnd vout bl 1 bl 2 bl 3 fl bl 4 flash c in 2.2 f main backlight ldo 1 ldo 2 1 c + c1- c2+ c2- i 2 c data flash control v ldo1 = 2.5v to 3.3v v ldo2 = 1.5v to 1.8v enable control i 2 c clock scl en v bat c byp 22nf c1 2.2 f c2 2.2 f c out 4.7 f c ldo2 1 f c ldo1 1 f us patents: 6,504,422; 6,794,926 typical application circuit june 27, 2007
SC621A 2 pin confi guration marking information ordering information device package SC621Aultrt (1)(2) mlpq-ut-20 33 SC621Aevb evaluation board notes: (1) available in tape and reel only. a reel contains 3,000 devices. (2) available in lead-free package only. device is weee and rohs compliant. top view 1 2 3 4 t c2- bl1 pgnd fl 5 678910 scl sda ldo2 en byp ldo1 15 14 13 12 11 16 17 18 19 20 bl2 flen agnd bl4 bl3 vout vin c1- c2+ c1+ 621a yyww xxxx yyww = date code xxxx = semtech lot no. mlpq-ut-20; 3x3, 20 lead ja = 35c/w
SC621A 3 exceeding the above specifi cations may result in permanent damage to the devic e or device malfunction. operation outside of the parameters specifi ed in the electrical characteristics section is not recommended. notes: (1) tested according to jedec standard jesd22-a114-b. (2) calculated from package in still air, mounted to 3 x 4.5, 4 layer fr4 pcb with thermal vias under the exposed pad per je sd51 standards. absolute maximum ratings vin (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 vout (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0 c1+, c2+ (v) . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (v out + 0.3) pin voltage - all other pins (v) . . . . . . . . . . . -0.3 to (v in + 0.3) vout short circuit duration . . . . . . . . . . . . . . . . con tinuous vldo1, vldo2 short circuit duration . . . . . . . con tinuous esd protection level (1) (kv) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 recommended operating conditions ambient temperature range (c) . . . . . . . . -40 < t a < +85 vin (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.0 < v in < 5.5 vout (v) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 < v out < 5.25 voltage diff erence between any two leds (v) . . . . . . < 1.2 thermal information thermal resistance, junction to ambient (2) (c/w) . . . . 35 maximum junction temperature (c) . . . . . . . . . . . . . . +150 storage temperature range (c) . . . . . . . . . . . . -65 to +150 peak ir reflow temperature (10s to 30s) (c) . . . . . . . +260 unless otherwise noted, t a = +25c for typ, -40oc to +85c for min and max, t j(max) = 125oc, v in = 3.0v to 4.2v, c in = c 1 = c 2 = 2.2f, c out = 4.7f (esr = 0.03), v f 1.2v (1) parameter symbol conditions min typ max units supply specifi cations shutdown current i q(off) shutdown, v in = 4.2v 0.1 2 a total quiescent current i q sleep (ldos off ), en = v in 100 160 a sleep (ldos on), en = v in , v in > (v ldo + 300mv), i ldo < 200ma 220 340 charge pump in 1x mode, 4 backlights on 3.8 4.65 ma charge pump in 1.5x mode, 4 backlights on 4.6 5.85 charge pump in 2x mode, 4 backlights on 4.6 5.85 fault protection output short circuit current limit i out(sc) vout pin shorted to gnd 300 ma over-temperature t otp 160 c flash mode safety timer (2) t fl(max) flash sink active 0.75 1.00 1.25 s electrical characteristics
SC621A 4 parameter symbol conditions min typ max units fault protection (continued) charge pump over-voltage protection v ovp vout pin open circuit, v out = v ovp rising threshold 5.3 5.7 6.0 v undervoltage lockout v uvlo decreasing v in 2.4 v v uvlo-hys 300 mv charge pump electrical specifi cations maximum total output current i out(max) v in > 3.4v, sum of all active led currents, v out(max) = 4.0v 500 ma backlight current setting i bl nominal setting for bl1 thru bl4 0.5 25 ma flash current setting i fl nominal setting for fl 50 400 ma backlight current accuracy i bl_acc v in = 3.7v, i bl = 12ma, t a = 25c -8 1.5 +8 % backlight current matching i bl-bl v in = 3.7v, i bl = 12ma (3) -3.5 0.5 +3.5 % flash current accuracy i fl_acc v in = 3.7v, i fl = 400ma, t a = 25c -15 +15 % 1x mode to 1.5x mode falling transition voltage v trans1x i out = 40ma, i bln = 10ma, v out = 3.2v 3.27 v 1.5x mode to 1x mode hysteresis v hyst1x i out = 40ma, i bln = 10ma, v out = 3.2v 250 mv 1.5x mode to 2x mode falling transition voltage v trans1.5x i out = 40ma, i bln = 10ma, v out = 4.0v (4) 2.92 v 2x mode to 1.5x mode hysteresis v hyst1.5x i out = 40ma, i bln = 10ma, v out = 4.0v (4) 300 mv current sink off -state leakage current i bln v in = v bln = 4.2v 0.1 1 a pump frequency f pump v in = 3.2v 250 khz ldo electrical specifi cations ldo1 voltage setting v ldo1 range of nominal settings in 100mv increments 2.5 3.3 v ldo2 voltage setting v ldo2 range of nominal settings in 100mv increments 1.5 1.8 v ldo1, ldo2 output voltage accuracy v ldo1, v ldo2 v in = 3.7v, i ldo = 1ma -3.5 3 +3.5 % line regulation v line ldo1, i ldo1 = 1ma, v out = 2.8v 2.1 7.2 mv ldo2, i ldo2 = 1ma, v out = 1.8v 1.3 4.8 electrical characteristics (continued)
SC621A 5 electrical characteristics (continued) parameter symbol conditions min typ max units ldo electrical specifi cations (continued) load regulation v load v ldo1 = 3.3v, v in = 3.7v, i ldo1 = 1ma to 100 ma 25 mv v ldo2 = 1.8v, v in = 3.7v, i ldo2 = 1ma to 100 ma 20 dropout voltage (5) v d i ldo1 = 100ma 100 150 mv current limit i lim 200 ma power supply rejection ratio psrr ldo1 2.5v < v ldo1 < 3v, f < 1khz, c byp = 22nf, i ldo1 = 50ma, v in = 3.7v with 0.5v p-p ripple 50 db psrr ldo2 f < 1khz, c byp = 22nf, i ldo2 = 50ma, v in = 3.7v with 0.5v p-p ripple 60 output voltage noise e n-ldo1 ldo1, 10hz < f < 100khz, c byp = 22nf, c ldo = 1f, i ldo1 = 50 ma, v in = 3.7v, 2.5v < v ldo1 < 3v 100 v rms e n-ldo2 ldo2, 10hz < f < 100khz, c byp = 22nf, c ldo = 1f, i ldo2 = 50 ma, v in = 3.7v 50 minimum output capacitor c ldo(min) 1f digital i/o electrical specifi cations (flen, en) input high threshold v ih v in = 5.5v 1.6 v input low threshold v il v in = 3.0v 0.4 v input high current i ih v in = 5.5v -1 +1 a input low current i il v in = 5.5v -1 +1 a i 2 c interface interface complies with slave mode i 2 c interface as described by philips i 2 c specifi cation version 2.1 dated january, 2000. digital input voltage v b-il 0.4 v v b-ih 1.6 v sda output low level i din (sda) 3ma 0.4 v digital input current i b-in -0.2 0.2 a hysteresis of schmitt trigger inputs v hys 0.1 v maximum glitch pulse rejection t sp 50 ns
SC621A 6 notes: (1) v f is the voltage difference between any two leds. (2) once tripped, fl ash output will remain disabled until flen pin is cycled or reset via serial interface. (3) current matching equals [i bl(max) - i bl(min ] / [i bl(max) + i bl(min) ]. (4) test voltage is v out = 4.0v a relatively extreme led voltage to force a transition during test. typically v out = 3.2v for white leds. (5) dropout is defi ned as (v in - v ldo1 ) when v ldo1 drops 100mv from nominal. dropout does not apply to ldo2 since it has a maximum output voltage of 1.8v. (6) guaranteed by design parameter symbol conditions min typ max units i 2 c interface (continued) i/o pin capacitance c in 10 pf i 2 c timing clock frequency f scl 400 440 khz scl low period (6) t low 1.3 s scl high period (6) t high 0.6 s data hold time (6) t hd_dat 0s data setup time (6) t su_dat 100 s setup time for repeated start condition (6) t su_sta 0.6 s hold time for repeated start condition (6) t hd_sta 0.6 s setup time for stop condition (6) t su_sto 0.6 s bus-free time between stop and start (6) t buf 1.3 s interface start-up time (6) t en bus start-up time after en pin is pulled high 1 ms electrical characteristics (continued)
SC621A 7 typical characteristics battery current (4 leds) 25ma each 100 110 120 130 140 150 160 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) battery current (ma) v out =3.66v, i out =100ma, 25 c backlight effi ciency (4 leds) 25ma each 50 60 70 80 90 100 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) % efficiency v out =3.66v, i out =100ma, 25 c backlight effi ciency (4 leds) 12ma each v out =3.50v, i out =48ma, 25c 50 60 70 80 90 100 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) % efficiency backlight effi ciency (4 leds) 5.0ma each 50 60 70 80 90 100 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) % efficiency v out =3.33v, i out =20ma, 25c battery current (4 leds) 5.0ma each 15 20 25 30 35 40 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) battery current (ma) v out =3.33v, i out =20ma, 25c battery current (4 leds) 12ma each 45 52 59 66 73 80 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) battery current (ma) v out =3.50v, i out =48ma, 25c
SC621A 8 typical characteristics (continued) flash current 400ma spotlight current 50ma 47 48 49 50 51 52 53 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) spotlight current (ma) v out =3.02v at 25c flash current 300ma 310 340 370 400 430 460 490 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) flash current (ma) v out =3.39v at 25 c spotlight current 250ma 160 190 220 250 280 310 340 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) spotlight current (ma) v out =3.50v at 25c psrr vs. frequency (ldo2) -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 frequency (hz) psrr (db) v in =3.7v at 25c, i ldo2 =50ma, v ldo2 =1.8v psrr vs. frequency (ldo1) -70 -60 -50 -40 -30 -20 -10 0 10 100 1000 10000 frequency (hz) psrr (db) v in =3.7v at 25c, i ldo1 =50ma, v ldo1 =2.8v 210 240 270 300 330 360 390 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) flash current (ma) v out =3.58v at 25c
SC621A 9 typical characteristics (continued) load regulation (ldo1) -24 -16 -8 0 8 16 24 0306090 120 150 i ldo1 (ma) output voltage variation (mv) v ldo1 =3.3v, v in =3.7v, 25c noise vs load current (ldo1) 50 60 70 80 90 100 0 20 40 60 80 100 i ldo1 (ma) noise ( v) v ldo1 =2.8v, v in =3.7v, 25c load regulation (ldo2) -24 -16 -8 0 8 16 24 0 30 60 90 120 150 i ldo2 (ma) output voltage variation (mv) v ldo2 =1.8v, v in =3.7v, 25c noise vs load current (ldo2) 0 20 40 60 80 100 0 20 40 60 80 100 i ldo2 (ma) noise ( v) v ldo2 =1.8v, v in =3.7v, 25c line regulation (ldo1) -3 -2 -1 0 1 2 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) output voltage variation (mv) v ldo1 =2.8v, i ldo1 =1ma, 25c line regulation (ldo2) -3 -2 -1 0 1 2 3.0 3.2 3.4 3.6 3.8 4.0 4.2 v in (v) output voltage variation (mv) v ldo2 =1.8v, i ldo2 =1ma, 25c
SC621A 10 typical characteristics (continued) load transient response (ldo2) falling edge time (200 s/div) v ldo2 (50mv/div) i ldo2 (100ma/div) v in =3.7v, v ldo2 =1.8v, i ldo2 =100 to 1ma load transient response (ldo1) rising edge time (20 s/div) v ldo1 (50mv/div) i ldo1 (100ma/div) v in =3.7v, v ldo1 =2.8v, i ldo1 =1 to 100ma time (200 s/div) load transient response (ldo1) falling edge v in =3.7v, v ldo1 =2.8v, i ldo1 =100 to 1ma v ldo1 (50mv/div) i ldo1 (100ma/div) time (20 s/div) load transient response (ldo2) rising edge v in =3.7v, v ldo2 =1.8v, i ldo2 =1 to 100ma v ldo2 (50mv/div) i ldo2 (100ma/div)
SC621A 11 typical characteristics (continued) output short circuit current limit time (1ms/div) v out (1v/div) i out (100ma/div ) v out =0v, v in =4.2v, 25c flash mode safety timer time (200ms/div) v flen (5v/div) v out (2v/div) i fl (200ma/div ) v in =3.7v, 25c output open circuit protection time (200 s/div) v bl1 (500mv/div) v out (2v/div) i bl1 (20ma/div ) v in =3.7v, 25c flash current pulse v flen (5v/div) v out (2v/div) i fl (200ma/div) i fl =400ma, v in =3.7v, v out =3.7v, 25c time (40ms/div)
SC621A 12 pin descriptions pin # pin name pin function 1 c2- negative connection to bucket capacitor 2 requires a 2.2f capacitor connected to c2+ 2 pgnd ground pin for high current charge pump and flash led driver 3 fl current sink output for fl ash led(s) 4 bl1 current sink output for main backlight led 1 leave this pin open if unused 5 bl2 current sink output for main backlight led 2 leave this pin open if unused 6 bl3 current sink output for main backlight led 3 leave this pin open if unused 7 bl4 current sink output for main backlight led 4 leave this pin open if unused 8 agnd analog ground pin connect to ground and separate from pgnd current 9 scl i 2 c clock input pin 10 flen control pin for fl ash led(s) high = on, low = off 11 sda i 2 c bi-directional data pin used for read and write operations for all internal registers (refer to register map and i 2 c interface sections) 12 en chip enable active high low state resets all registers (see register map table) 13 byp bypass pin for voltage reference connect with a 22nf capacitor to agnd 14 ldo2 output of ldo2 connect with a 1f capacitor to agnd 15 ldo1 output of ldo1 connect with a 1f capacitor to agnd 16 vout charge pump output all led anode pins should be connected to this pin requires a 4.7f capacitor to pgnd 17 c2+ positive connection to bucket capacitor 2 requires a 2.2f capacitor connected to c2- 18 c1+ positive connection to bucket capacitor 1 requires a 2.2f capacitor connected to c1- 19 vin battery voltage input connect with a 2.2f capacitor to pgnd 20 c1- negative connection to bucket capacitor 1 requires a 2.2f capacitor connected to c1+ t thermal pad thermal pad for heatsinking purposes connect to ground plane using multiple vias not connected internally
SC621A 13 block diagram oscillator current setting dac i 2 c compatible interface and logic control mahxlife tm fractional charge pump (1x, 1.5x, 2x) voltage setting dac ldo1 ldo2 vin vin 4 5 6 7 3 15 14 8 9 2 11 10 18 12 20 17 1 c1+c1- c2+c2- vout 16 bl1 bl2 bl3 bl4 fl vin vin en flen pgnd ldo2 ldo1 vout agnd bandgap reference 13 byp scl 19 sda
SC621A 14 general description this design is optimized for handheld applications supplied from a single li-ion cell and includes the following key features: a high effi ciency fractional charge pump that supplies power to all leds four matched current sinks that control led backlighting current, with 0.5ma to 25ma per led an led fl ash output that provides up to 400ma of momentary current or up to 250ma of continuous spotlight current two adjustable ldos with outputs ranging from 2.5v to 3.3v for ldo1 and 1.5v to 1.8v for ldo2, adjustable in 100mv increments an i 2 c compatible interface that provides control of all device functions high current fractional charge pump the backlight and fl ash outputs are supported by a high effi ciency, high current fractional charge pump output at the vout pin. the charge pump multiplies the input voltage by 1, 1.5, or 2 times. the charge pump switches at a fi xed frequency of 250khz in 1.5x and 2x modes and is disabled in 1x mode to save power and improve effi ciency. the mode selection circuit automatically selects the 1x, 1.5x or 2x mode based on circuit conditions. circuit conditions such as low input voltage, high output current, or high led voltage place a higher demand on the charge pump output. a higher numerical mode may be needed momentarily to maintain regulation at the vout pin during intervals of high demand, such as the high current of an led fl ash or the droop at the vin pin during a supply voltage transient. the charge pump responds to these momentary high demands, setting the charge pump to the optimum mode (1x, 1.5x or 2x), as needed to deliver the output voltage and load current while optimizing effi ciency. hysteresis is provided to prevent mode toggling. the charge pump requires two bucket capacitors for low ripple operation. one capacitor must be connected ? ? ? ? ? between the c1+ and c1- pins and the other must be connected between the c2+ and c2- pins as shown in the typical application circuit diagram. these capacitors should be equal in value, with a minimum capacitance of 2.2f to support the charge pump current requirements. the device also requires a 2.2f capacitor on the vin pin and a 4.7f capacitor on the vout pin to minimize noise and support the output drive requirements. capacitors with x7r or x5r ceramic dielectric are strongly recommended for their low esr and superior temperature and voltage characteristics. y5v capacitors should not be used as their temperature coeffi cients make them unsuitable for this application. led backlight current sinks the backlight current is set via the i 2 c compatible interface. the current is regulated to one of 32 values between 0.5ma and 25ma. the step size varies depending upon the current setting. between 0.5ma and 12ma, the step size is 0.5ma. the step size increases to 1ma for settings between 12ma and 15ma and 2ma for settings greater than 15ma. this feature allows fi ner adjustment for dimming functions in the low current setting range and coarse adjustment at higher current settings where small current changes are not visibly noticeable in led brightness. all backlight current sinks have matched currents, even when there is variation in the forward voltages (v f ) of the leds. a v f of 1.2v is supported when the input voltage is at 3.0v. higher v f led mis-match is supported when v in is higher than 3.0v. all current sink outputs are compared and the lowest output is used for setting the voltage regulation at the vout pin. this is done to ensure that suffi cient bias exists for all leds, including the fl ash led. the backlight leds default to the off state upon power- up. for backlight applications using less than four leds, any unused output must be left open and the unused led driver must remain disabled. when writing to the backlight enable control register, a zero (0) must be written to the corresponding bit of any unused output. applications information
SC621A 15 applications information (continued) backlight quiescent current the quiescent current required to operate all four backlights is reduced by 1.5ma when backlight current is set to 4.0ma or less. this feature results in higher effi ciency under light-load conditions. further reduction in quiescent current will result from using fewer than four leds. fade-in and fade-out backlight brightness can be set to automatically fade-in when current is set to increase and fade-out when current is set to decrease. when enabled with a new current setting, the current will step through each incremental setting between the old and new values. the result is a visually smooth change in brightness with a rate of fade that can be set to 8, 16, 24, or 32 ms per step. led flash and spotlight current sink a single output current sink is provided to drive both fl ash and spotlight functions. in fl ash mode, this current sink provides up to 400ma for a fl ash led or array of parallel leds . flash current settings are in 50ma increments from 50ma to 400ma. the flen pin directly triggers the flash function when pulled high, or it can be wired to vin to enable software control via the serial interface. in spotlight mode, the output can be set for up to 250ma of continuous current. settings are available in 50ma increments from 50ma to 250ma. continuous operation above 250ma is not recommended due to high power dissipation. flash and spotlight safety timer a safety timer disables the fl ash and spotlight output current sink if the sink remains active for an extended period. the timer protects the SC621A and the led from high power dissipation that can cause overheating. the timers default state is on, but the timer may be disabled via the serial interface to allow continuous output current in spotlight mode. the safety timer aff ects only the fl pin and will turn off the sink after a period of 1 second. the timer may be reset by either forcing the flen pin low or by resetting the flash/spotlight control bits via the interface. programmable ldo outputs two low dropout (ldo) regulators are provided for camera module i/o and core power. each ldo has at least 100ma of available load current with 3.5% accuracy. the minimum current limit is 200ma, so outputs greater than 100ma are possible at somewhat reduced accuracy. a 1f, low esr capacitor should be used as a bypass capacitor on each ldo output to reduce noise and ensure stability. in addition, it is recommended that a minimum 22nf capacitor be connected from the byp pin to ground to minimize noise and achieve optimum power supply rejection. a larger capacitor can be used for this function, but at the expense of increasing turn- on time. capacitors with x7r or x5r ceramic dielectric are strongly recommended for their low esr and superior temperature and voltage characteristics. y5v capacitors should not be used as their temperature coeffi cients make them unsuitable for this application. shutdown state the device is disabled when the en pin is low. all registers are reset to default condition when en is low. sleep mode when all leds are off , sleep mode is activated. this is a reduced current mode that helps minimize overall current consumption by turning off the clock and the charge pump while continuing to monitor the serial interface for commands. both ldos can be powered up while in sleep mode. i 2 c compatible interface functions all device functions can be controlled via the i 2 c compatible interface. the interface is described in detail in the serial i nterface section of the datasheet.
SC621A 16 protection features the SC621A provides several protection features to safeguard the device from catastrophic failures. these features include: output open circuit protection over-temperature protection charge pump output current limit ldo current limit led float detection output open circuit protection over-voltage protection (ovp) is provided at the vout pin to prevent the charge pump from producing an excessively high output voltage. in the event of an open circuit at vout, the charge pump runs in open loop and the voltage rises up to the ovp limit. ovp operation is hysteretic, meaning the charge pump will momentarily turn off until v out is suffi ciently reduced. the maximum ovp threshold is 6.0v, allowing the use of a ceramic output capacitor rated at 6.3v with no fear of over-voltage damage. over-temperature protection the over-temperature (ot) protection circuit helps prevent the device from overheating and experiencing a catastrophic failure. when the junction temperature exceeds 160 c, the device goes into thermal shutdown with all outputs disabled until the junction temperature is reduced. all register information is retained during thermal shutdown. ? ? ? ? ? applications information (continued) charge pump output current limit the device also limits the charge pump current at the vout pin. when vout is shorted to ground, the typical output current is 300ma. the current limiting is triggered by an output under-voltage lockout below 2v. the output returns to normal when the short is removed and vout is above 2.5v. above 2.5v, a typical current limit of 300ma applies when the fl current sink is off and a typical current limit of 1a applies when the fl current sink is on. ldo current limit the device limits the output currents of ldo1 and ldo2 to help prevent it from overheating and to protect the loads. the minimum limit is 200ma, so load current greater than the rated 100ma can be used with degraded accuracy and larger dropout without tripping the current limit. led float detection float detect is a fault detection feature of the led current sink outputs. if an output is programmed to be enabled and an open circuit fault occurs at any current sink output, that output will be disabled to prevent a sustained output ovp condition from occurring due to the resulting open loop. float detect ensures device protection but does not ensure optimum performance. unused led outputs must be disabled to prevent an open circuit fault from occurring.
SC621A 17 pcb layout considerations the layout diagram in figure 1 illustrates a proper two-layer pcb layout for the SC621A and supporting components. following fundamental layout rules is critical for achieving the performance specifi ed in the electrical characteristics table. the following guidelines are recommended when developing a pcb layout: place all bypass and decoupling capacitors c1, c2, cin, cout, cldo1, cldo2, and cbyp as close to the device as possible. all charge pump current passes through vin, vout, and the bucket capacitor connection pins. ensure that all connections to these pins make use of wide traces so that the resistive drop on each connection is minimized. the thermal pad should be connected to the ground plane using multiple vias to ensure proper thermal connection for optimal heat transfer. ? ? ? applications information (continued) make all ground connections to a solid ground plane as shown in the example layout (figure 3). if a ground layer is not feasible, the following groupings should be connected: pgnd cin, cout agnd ground pad, cldo1, cldo2, cbyp if no ground plane is available, pgnd and agnd should be routed back to the negative battery terminal as separate signals using thick traces. joining the two ground returns at the terminal prevents large pulsed return currents from mixing with the low-noise return currents of the ldos. both ldo output traces should be made as wide as possible to minimize resistive losses. ? ? ? ? ? ? cout c1 c2 cin cbyp cldo2 bl1 bl2 bl4 ldo1 ldo2 byp c1- c2- vin c1+ c2+ vout sda agnd scl bl3 vin vout SC621A flen fl en gnd cldo1 gnd pgnd figure 1 recommended pcb layout figure 2 layer 1 figure 3 layer 2
SC621A 18 register map address d7 d6 d5 d4 d3 d2 d1 d0 reset value description 0x00 fade_1 fade_0 fade_en bl_4 bl_3 bl_2 bl_1 bl_0 0x00 backlight current control 0x01 0 (1) 0 (1) 0 (1) 0 (1) blen_4 blen_3 blen_2 blen_1 0x00 backlight enable control 0x02 0 (1) 0 (1) 0 (1) flto fl_2 fl_1 fl_0 fl/splb 0x10 flash/spotlight control 0x03 0 (1) ldo2_2 ldo2_1 ldo2_0 ldo1_3 ldo1_2 ldo1_1 ldo1_0 0x00 ldo control notes: (1) 0 = always write a 0 to these bits register and bit defi nitions backlight current control register (0x00) this register is used to set the currents for the backlight current sinks, as well as to enable and set the fade step rate. these current sinks need to be enabled in the backlight enable control register to be active. fade[1:0] these bits are used to set the rise/fall rate between two backlight currents as follows: fade_1 fade_0 fade feature rise/fall rate (ms/step) 0 0 32 01 24 10 16 11 8 the number of steps in changing the backlight current will be equal to the change in binary count of bits bl[4:0]. fade_en this bit is used to enable or disable the fade feature. when the fade function is enabled and a new backlight current is set, the backlight current will change from its current value to a new value set by bits bl[4:0] at a rate of 8ms to 32ms per step. a new backlight level cannot be written during an ongoing fade operation, but an ongoing fade operation may be cancelled by resetting the fade bit. clearing the fade bit during an ongoing fade operation changes the backlight current immediately to the value of bl[4:0]. the number of counts to complete a fade operation equals the diff erence between the old and new backlight values to increment or decrement the bl[4:0] bits. if the fade bit is cleared, the current level will change immediately without the fade delay. the rate of fade may be changed dynamically, even while a fade operation is active, by writing new values to the fade_1 and fade_0 bits. the total fade time is determined by the number of steps between old and new backlight values, multiplied by the rate of fade in ms/step. the longest elapsed time for a full scale fade-out of the backlight is nominally 1.024 seconds when the default interval of 32ms is used.
SC621A 19 register and bit defi nitions (continued) bl[4:0] these bits are used to set the current for the backlight current sinks. all enabled backlight current sinks will sink the same current, as shown in table 1. bl_4 bl_3 bl_2 bl_1 bl_0 backlight current (ma) 00000 0.5 00001 1.0 00010 1.5 00011 2.0 00100 2.5 00101 3.0 00110 3.5 00111 4.0 01000 4.5 01001 5 01010 5.5 01011 6 01100 6.5 01101 7 01110 7.5 01111 8 10000 8.5 10001 9 10010 9.5 10011 10 10100 10.5 10101 11 10110 11.5 10111 12 11000 13 11001 14 11010 15 11011 17 11100 19 11101 21 11110 23 11111 25 table 1 backlight current control bits bl enable control register (0x01) this register is used to enable the backlight current sinks. blen[4:1] these bits are used to enable current sinks (active high, default low). blen_4 enable bit for backlight bl4 blen_3 enable bit for backlight bl3 blen_2 enable bit for backlight bl2 blen_1 enable bit for backlight bl1 when enabled, the current sinks will carry the current set by the backlight current control bits bl[4:0], as shown in table 1. flash/spotlight control register (0x02) this register is used to confi gure the fl ash time-out feature, the fl ash or spotlight current, and select fl ash or spotlight current ranges. flto this bit is used to enable the fl ash safety time-out feature. the default state is enabled with flto = 1. if this bit is set, the device will turn off the fl ash after a nominal period of 1s . two ways to re-enable the fl ash function after a safety time-out are: pull the flen pin low to re-enable the fl ash function clear and re-write fl[2:0] fl[2:0] these bits are used to set the current for the fl ash current sink when confi gured for fl ash or spotlight by the fl/splb bit. bits fl[2:0] set the fl ash or spotlight current, as shown in table 2. ? ?
SC621A 20 table 2 flash/spotlight control bits fl_2 fl_1 fl_0 fl/ splb flash/spotlight current (ma) 0 0 0 0 off 001 0 50 0 1 0 0 100 0 1 1 0 150 1 0 0 0 200 1 0 1 0 250 1 1 0 0 250 1 1 1 0 250 0 0 0 1 off 0 0 1 1 300 (1) 0 1 0 1 350 (1) 0 1 1 1 400 (1) 1 0 0 1 400 (1) 1 0 1 1 400 (1) 1 1 0 1 400 (1) 1 1 1 1 400 (1) note: (1) when on continuously, the device may reach the temperature limit with 300ma and higher. fl/splb this bit is used to select either the fl ash or spotlight current ranges. if this bit is set, the fl current sink can be used to drive a fl ash of maximum duration 500ms and the current range will be the high (fl ash) current range. if this bit is cleared, the fl current sink can be used to drive a continuous spotlight at a lower current and the current range will be the lower (spotlight) current range, as shown in table 2. ldo control register (0x03) this register is used to enable the ldos and to set their output voltages. ldo2[2:0] these bits are used to set the output voltage of ldo2, as shown in table 3. ldo2_2 ldo2_1 ldo2_0 ldo2 output voltage 0 0 0 off 0 0 1 1.8v 0 1 0 1.7v 0 1 1 1.6v 1 0 0 1.5v 101 through 111 are not used off table 3 ldo2 control bits ldo1[3:0] these bits set the output voltage of ldo1, as shown in table 4. ldo1_3 ldo1_2 ldo1_1 ldo1_0 ldo1 output voltage 0000off 0001 3.3v 0010 3.2v 0011 3.1v 0100 3.0v 0101 2.9v 0110 2.8v 0111 2.7v 1000 2.6v 1001 2.5v 1010 through 1111 are not used off table 4 ldo1 control bits register and bit defi nitions (continued)
SC621A 21 the i 2 c general specifi cation the SC621A is a read-write slave-mode i 2 c device and complies with the philips i 2 c standard version 2.1, dated january 2000. the SC621A has four user-accessible internal 8-bit registers. the i 2 c interface has been designed for program fl exibility, supporting direct format for write operation. read operations are supported on both combined format and stop separated format. while there is no auto increment/decrement capability in the SC621A i 2 c logic, a tight software loop can be designed to randomly access the next register independent of which register you begin accessing. the start and stop commands frame the data-packet and the repeat start condition is allowed if necessary. SC621A limitations to the i 2 c specifi cations the SC621A only recognizes seven bit addressing. this means that ten bit addressing and cbus communication are not compatible. the device can operate in either standard mode (100kbit/s) or fast mode (400kbit/s). slave address assignment the seven bit slave address is 0110 111x. the eighth bit is the data direction bit. 0x6e is used for a write operation, and 0x6f is used for a read operation. supported formats the supported formats are described in the following subsections. direct format write the simplest format for an i 2 c write is direct format. after the start condition [s], the slave address is sent, followed by an eighth bit indicating a write. the SC621A i 2 c then acknowledges that it is being addressed, and the master responds with an 8 bit data byte consisting of the register address. the slave acknowledges and the master sends the appropriate 8 bit data byte. once again the slave acknowledges and the master terminates the transfer with the stop condition [p]. combined format read after the start condition [s], the slave address is sent, followed by an eighth bit indicating a write. the SC621A i 2 c then acknowledges that it is being addressed, and the master responds with an 8 bit data byte consisting of the register address. the slave acknowledges and the master sends the repeated start condition [sr]. once again, the slave address is sent, followed by an eighth bit indicating a read. the slave responds with an acknowledge and the previously addressed 8 bit data byte; the master then sends a non-acknowledge (nack). finally, the master terminates the transfer with the stop condition [p]. stop separated reads stop-separated reads can also be used. this format allows a master to set up the register address pointer for a read and return to that slave at a later time to read the data. in this format the slave address followed by a write command are sent after a start [s] condition. the SC621A then acknowledges it is being addressed, and the master responds with the 8-bit register address. the master sends a stop or restart condition and may then address another slave. after performing other tasks, the master can send a start or restart condition to the SC621A with a read command. the device acknowledges this request and returns the data from the register location that had previously been set up. serial interface
SC621A 22 serial interface (continued) i 2 c direct format write slave address register address data swa a ap s ? start condition w ? write = ?0? a ? acknowledge (sent by slave) p ? stop condition slave address ? 7-bit register address ? 8-bit data ? 8-bit i 2 c stop separated format read slave address register address slave address b data nack s w a a s/sr r a p p slave address s register address setup access master addresses other slaves register read access s ? start condition w ? write = ?0? r ? read = ?1? a ? acknowledge (sent by slave) nak ? non-acknowledge (sent by master) sr ? repeated start condition p ? stop condition slave address ? 7-bit register address ? 8-bit data ? 8-bit i 2 c combined format read slave address register address slave address data nack s wa a sr r a p s ? start condition w ? write = ?0? r ? read = ?1? a ? acknowledge (sent by slave) nak ? non-acknowledge (sent by master) sr ? repeated start condition p ? stop condition slave address ? 7-bit register address ? 8-bit data ? 8-bit
SC621A 23 e 1 2 n pin 1 indicator (laser mark) a1 a a2 c seating plane e/2 d/2 b .006 .008 .010 0.15 0.20 0.25 lxn bxn d1 e1 coplanarity applies to the exposed pad as well as the terminals . 2. controlling dimensions are in millimeters (angles in degrees). 1. inches dimensions nom e bbb aaa a1 a2 d1 e1 dim n l e min d a millimeters max min max nom e b d .114 .118 3.00 .122 2.90 3.10 notes: bbb c a b aaa c .003 .061 20 .067 .000 .020 - - (.006) 0.08 20 .071 1.55 .024 .002 0.00 0.50 1.80 1.70 0.05 0.60 (0.1524) - - .004 0.10 1.55 2.90 1.70 1.80 3.00 3.10 0.40 bsc .016 bsc 0.30 .012 .020 .016 0.40 0.50 .122 .118 .114 .071 .067 .061 a dap is 1.90 x 190mm. 3. outline drawing mlpq-ut-20 3x3
semtech corporation power management products division 200 flynn road, camarillo, ca 93012 phone: (805) 498-2111 fax: (805) 498-3804 www.semtech.com contact information SC621A 24 land pattern mlpq-ut-20 3x3 this land pattern is for reference purposes only. consult your manufacturing group to ensure your company's manufacturin g guidelines are met. notes: 1. c z r y x g p h .146 .004 .008 .031 .083 .067 .016 3.70 0.20 0.80 0.10 1.70 0.40 2.10 dim (2.90) millimeters dimensions (.114) inches controlling dimensions are in mi llimeters (angles in degrees). 2. k .067 1.70 thermal vias in the land pattern of the exposed pad shall be connected to a system ground plane. functional performance of the device. failure to do so may compromise the thermal and/or 3. h k r (c) x p y g z

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